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Interface reactions at TiN/HfSiON gate stacks: Dependence on the electrode structure and deposition method

机译:TiN / HfSiON栅堆叠处的界面反应:取决于电极结构和沉积方法

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We systematically investigated intrinsic and extrinsic thermal reactions at TiN/HfSiON gate stacks. The formation of an ultrathin TiO2 interlayer was found to be an intrinsic reaction at the metal/insulator interface, but growth of SiO2 underlayers between HfSiON and Si substrates, which determines the electrical thickness of metal-oxide-semiconductor (MOS) devices, depends on the structure and deposition method of the gate electrodes. Physical vapor deposition (PVD) grown TiN electrodes covered with W overlayers exhibited excellent thermal stability at up to 1000?°C. Formation of ultrathin TiO2 interlayers reduced gate leakage current (Ig), and growth of the oxide underlayer was suppressed by less than a few angstroms even for 1000?°C annealing. In contrast, we found that halogen impurities within CVD-grown metal electrodes enhance interface SiO2 growth, resulting in deterioration of equivalent oxide thickness (EOT) versus Ig characteristics of the gate stacks.
机译:我们系统地研究了TiN / HfSiON栅叠层的内在和外在热反应。发现超薄TiO 2 中间层的形成是金属/绝缘体界面的固有反应,但是SiO 2 底层在HfSiON和Si衬底之间的生长决定了金属氧化物半导体(MOS)器件的电厚度取决于栅电极的结构和沉积方法。用W覆盖层覆盖的物理气相沉积(PVD)生长的TiN电极在高达1000?C的温度下表现出出色的热稳定性。形成超薄的TiO 2 中间层减少了栅极漏电流(I g ),即使在1000°C退火条件下,氧化物底层的生长也被抑制了不到几埃。 。相反,我们发现CVD生长的金属电极中的卤素杂质会增强界面SiO 2 的生长,导致等效氧化物厚度(EOT)相对于I g 特性的劣化。门栈。

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