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Design of 340 GHz 2× and 4× Sub-Harmonic Mixers Using Schottky Barrier Diodes in Silicon-Based Technology

机译:基于硅技术的肖特基势垒二极管设计340 GHz 2×和4×次谐波混频器

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This paper presents the design of terahertz 2× and 4× sub-harmonic down-mixers using Schottky Barrier Diodes fabricated in standard 0.13 μm SiGe BiCMOS technology. The 340 GHz sub-harmonic mixers (SHMs) are designed based on anti-parallel-diode-pairs (APDPs). With the 2nd and 4th harmonic, local oscillator (LO) frequencies of 170 GHz and 85 GHz are used to pump the two 340 GHz SHMs. With LO power of 7 dBm, the 2× SHM exhibits a conversion loss of 34.5–37 dB in the lower band (320–340 GHz) and 35.5–41 dB in the upper band (340–360 GHz); with LO power of 9 dBm, the 4× SHM exhibits a conversion loss of 39–43 dB in the lower band (320–340 GHz) and 40–48 dB in the upper band (340–360 GHz). The measured input 1-dB conversion gain compression point for the 2× and 4× SHMs are −8 dBm and −10 dBm at 325 GHz, respectively. The simulated LO-IF (intermediate frequency) isolation of the 2× SHM is 21.5 dB, and the measured LO-IF isolation of the 4× SHM is 32 dB. The chip areas of the 2× and 4× SHMs are 330 μm × 580 μm and 550 μm × 610 μm, respectively, including the testing pads.
机译:本文介绍了采用标准0.13μmSiGe BiCMOS技术制造的肖特基势垒二极管设计的太赫兹2×和4×次谐波下混频器的设计。 340 GHz次谐波混频器(SHM)是基于反并联二极管对(APDP)设计的。对于2次和4次谐波,使用170 GHz和85 GHz的本地振荡器(LO)频率来泵浦两个340 GHz SHM。在7 dBm的LO功率下,2×SHM在较低频段(320–340 GHz)的转换损耗为34.5–37 dB,在较高频段(340–360 GHz)的转换损耗为35.5–41 dB;当LO功率为9 dBm时,4×SHM在较低频段(320–340 GHz)的转换损耗为39–43 dB,在较高频段(340–360 GHz)的转换损耗为40–48 dB。在325 GHz处,针对2x和4x SHM的测量输入1dB转换增益压缩点分别为-8 dBm和-10 dBm。 2x SHM的模拟LO-IF(中频)隔离度为21.5 dB,而实测的4x SHM的LO-IF隔离度为32 dB。 2x和4x SHM的芯片面积分别为330μm×580μm和550μm×610μm,包括测试焊盘。

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