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Effect of Annealing Process on the Properties of Ni(55%)Cr(40%)Si(5%) Thin-Film Resistors

机译:退火工艺对Ni(55%)Cr(40%)Si(5%)薄膜电阻器性能的影响

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Resistors in integrated circuits (ICs) are implemented using diffused methods fabricated in the base and emitter regions of bipolar transistor or in source/drain regions of CMOS. Deposition of thin films on the wafer surface is another choice to fabricate the thin-film resistors in ICs’ applications. In this study, Ni(55%)Cr(40%)Si(5%) (abbreviated as NiCrSi) in wt % was used as the target and the sputtering method was used to deposit the thin-film resistors on Al2O3 substrates. NiCrSi thin-film resistors with different thicknesses of 30.8 nm~334.7 nm were obtained by controlling deposition time. After deposition, the thin-film resistors were annealed at 400 °C under different durations in N2 atmosphere using the rapid thermal annealing (RTA) process. The sheet resistance of NiCrSi thin-film resistors was measured using the four-point-probe method from 25 °C to 125 °C, then the temperature coefficient of resistance could be obtained. We aim to show that resistivity of NiCrSi thin-film resistors decreased with increasing deposition time (thickness) and the annealing process had apparent effect on the sheet resistance and temperature coefficient of resistance. We also aim to show that the annealed NiCrSi thin-film resistors had a low temperature coefficient of resistance (TCR) between 0 ppm/°C and +50 ppm/°C.
机译:使用在双极晶体管的基极和发射极区域或CMOS的源极/漏极区域中制造的扩散方法来实现集成电路(IC)中的电阻器。在晶片表面上沉积薄膜是在IC应用中制造薄膜电阻器的另一选择。在这项研究中,以重量百分比计的Ni(55%)Cr(40%)Si(5%)(缩写为NiCrSi)被用作靶材,并采用溅射方法在Al sub> sub> sub 上沉积薄膜电阻器2 O 3 个基板。通过控制沉积时间,可以得到厚度为30.8 nm〜334.7 nm的NiCrSi薄膜电阻。沉积后,使用快速热退火(RTA)工艺在N 2 气氛中以不同的持续时间在400°C下退火薄膜电阻器。使用四点探针法在25°C至125°C范围内测量NiCrSi薄膜电阻器的薄层电阻,然后可以得出电阻的温度系数。我们旨在表明,NiCrSi薄膜电阻器的电阻率随沉积时间(厚度)的增加而降低,并且退火工艺对薄膜电阻和电阻温度系数具有明显的影响。我们还旨在表明,退火后的NiCrSi薄膜电阻器的电阻温度系数(TCR)在0 ppm /°C至+50 ppm /°C之间。

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