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首页> 外文期刊>EURASIP journal on embedded systems >Very Low-Memory Wavelet Compression Architecture Using Strip-Based Processing for Implementation in Wireless Sensor Networks
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Very Low-Memory Wavelet Compression Architecture Using Strip-Based Processing for Implementation in Wireless Sensor Networks

机译:使用基于条带的处理的超低内存小波压缩架构,可在无线传感器网络中实现

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This paper presents a very low-memory wavelet compression architecture for implementation in severely constrained hardware environments such as wireless sensor networks (WSNs). The approach employs a strip-based processing technique where an image is partitioned into strips and each strip is encoded separately. To further reduce the memory requirements, the wavelet compression uses a modified set-partitioning in hierarchical trees (SPIHT) algorithm based on a degree-0 zerotree coding scheme to give high compression performance without the need for adaptive arithmetic coding which would require additional storage for multiple coding tables. A new one-dimension (1D) addressing method is proposed to store the wavelet coefficients into the strip buffer for ease of coding. A softcore microprocessor-based hardware implementation on a field programmable gate array (FPGA) is presented for verifying the strip-based wavelet compression architecture and software simulations are presented to verify the performance of the degree-0 zerotree coding scheme.
机译:本文提出了一种非常低内存的小波压缩架构,可在无线传感器网络(WSN)等受严格限制的硬件环境中实现。该方法采用基于条的处理技术,其中将图像划分为条,并且每个条分别编码。为了进一步减少存储需求,小波压缩使用基于度0零树编码方案的改进的分层树集划分(SPIHT)算法,以提供高压缩性能,而无需自适应算术编码,而自适应算术编码需要额外的存储空间。多个编码表。提出了一种新的一维(1D)寻址方法,将小波系数存储到带状缓冲器中,以便于编码。提出了一种在现场可编程门阵列(FPGA)上基于软核微处理器的硬件实现,以验证基于条带的小波压缩架构,并提出了软件仿真,以验证0度零树编码方案的性能。

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