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K/Ka-Band Very High Data-Rate Receivers: A Viable Solution for Future Moon Exploration Missions

机译:K / Ka波段超高数据速率接收器:未来月球探测任务的可行解决方案

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This paper presents a feasibility study for a very high data rate receiver operating in the K/Ka-band suitable to future Moon exploration missions. The receiver specifications are outlined starting from the mission scenario and from a careful system analysis. The designed architecture uses a low noise front-end to down-convert the incoming K/Ka-band signal into a 3.7 GHz intermediate frequency (IF). For maximum flexibility, a software defined radio (SDR) is adopted for the I/Q demodulation and for the analog to digital conversion (ADC). The decoding operations and the data interface are carried out by a processor based on field programmable gate array (FPGA) circuits. To experimentally verify the above concepts, a preliminary front-end breadboard is implemented, operating between 27.5 and 30 GHz. The breadboard, which uses components off the shelf (COTS) and evaluation boards (EVBs), is characterized by a 46 dB gain, a 3.4 dB noise figure and a ? 37 dBm input-referred 1 dB compression point. Finally, a 40 Msym / s quadrature phase shift keying (QPSK) signal is demodulated by means of a commercially available SDR, demonstrating the above concept. The importance of these results is that they have been obtained exploiting a class of miniaturized and low cost microwave integrated circuits currently available on the market, opening the way to a dense communication infrastructure on cislunar space.
机译:本文提出了在K / Ka波段运行的非常高数据速率接收机的可行性研究,该接收机适用于未来的月球探测任务。从任务场景和仔细的系统分析开始,概述了接收机的规格。设计的架构使用低噪声前端将输入的K / Ka频段信号下变频为3.7 GHz中频(IF)。为了获得最大的灵活性,I / Q解调和模数转换(ADC)采用了软件无线电(SDR)。解码操作和数据接口由基于现场可编程门阵列(FPGA)电路的处理器执行。为了实验验证上述概念,实施了一个初步的前端面包板,工作在27.5至30 GHz之间。面包板使用现成的组件(COTS)和评估板(EVB),其特点是增益为46 dB,噪声系数为3.4 dB,噪声系数为?。 37 dBm输入参考1 dB压缩点。最后,利用市售的SDR对40 Msym / s的正交相移键控(QPSK)信号进行解调,证明了上述概念。这些结果的重要性在于,它们是通过利用目前市场上可用的一类小型化,低成本微波集成电路而获得的,从而为顺月空间上的密集通信基础设施开辟了道路。

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