Voltage Sag Mitigation in Multi-Line Transmission System Using GUPFC

摘要

Voltage sag is one of the most severe power quality disturbances to be dealt with by the industrial sector, as it can cause severe process disruptions and result in substantial economic loss. One of the main factors which limit capabilities of Dynamic Voltage Restorer (DVR) in compensating long-duration voltage sags is the amount of stored energy within the restorer. In order to overcome this limitation, Inter-line Dynamic Voltage Restorer (IDVR) has been proposed where two DVRs each compensating a transmission line by series voltage injection, connected with common dc-link. When one DVR compensates voltage sag, the other DVR of the IDVR replenish the dc-link energy storage. This IDVR works efficiently when the lines under consideration are connected with two different grid substations, as it is reasonable to assume that voltage sag in one line would have lesser impact on the other line. But in case when the lines are connected with same grid substation and feeding two different sensitive loads in an industrial park, voltage sag in one line affects the voltage profile of other lines. Under the above circumstances, long duration voltage sags cannot be mitigated by IDVR due to insufficient energy storage in dc-link. This study proposes a voltage sag compensator based on Generalized Unified Power Flow Controller (GUPFC), which comprises of three voltage-sourced converter modules sharing a common dc link. Two voltage-sourced converter modules connected in series with the lines, which compensates voltage sag and a third shunt converter module maintains bus voltage and replenish the common dc-link energy storage. The control strategy for power flow control of shunt converter and sag compensation control of series converters are discussed in detail. Adjustable carrier PWM is used for generating switching pulses. The simulation model of GUPFC is developed in this study. The salient advantages of the proposed method are compensating long duration deeper voltage sags, reduction in size of dc-link capacitor and simultaneous voltage sag compensation in all lines. Simulation results presented for a simple system under three-phase voltage sag of 40% and -20° phase angle jump demonstrates the efficiency of the proposed system.