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Study of Various Factors Affecting Performance of Multi-Core Processors

机译:影响多核处理器性能的各种因素的研究

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Advances in Integrated Circuit processing allow for more microprocessor design options. As Chip Multiprocessor system (CMP) become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single chip. This enables sharing of computation resources that was not previously possible. In addition the virtualization of these computation resources exposes the system to a mix of diverse and competing workloads. On chip Cache memory is a resource of primary concern as it can be dominant in controlling overall throughput. This Paper presents analysis of various parameters affecting the performance of Multi-core Architectures like varying the number of cores, changes L2 cache size, further we have varied directory size from 64 to 2048 entries on a 4 node, 8 node 16 node and 64 node Chip multiprocessor which in turn presents an open area of research on multicore processors with private/shared last level cache as the future trend seems to be towards tiled architecture executing multiple parallel applications with optimized silicon area utilization and excellent performance
机译:集成电路处理技术的进步允许更多的微处理器设计选择。随着芯片多处理器系统(CMP)成为领先微处理器的主要拓扑,现在系统的关键组件已集成在单个芯片上。这样可以共享以前不可能的计算资源。此外,这些计算资源的虚拟化使系统面临多种多样且相互竞争的工作负载。片上缓存是主要关注的资源,因为它在控制总体吞吐量方面可能占主导地位。本文介绍了影响多核体系结构性能的各种参数的分析,例如更改核数,更改L2缓存大小,以及在4节点,8节点,16节点和64节点上,我们将目录大小从64更改为2048个条目芯片多处理器继而为具有私有/共享末级高速缓存的多核处理器提供了一个开放的研究领域,因为未来的趋势似乎是朝着平铺架构执行具有优化的硅面积利用率和出色性能的并行应用程序

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