Design and implementation of quantum cellular automata based novel parity generator and checker circuits with minimum complexity and cell count

摘要

Quantum-dot Cellular Automata (QCA) is a possible future nanoelectronic computing technology, based on cells of coupled quantum dots. The QCA cells have features on the very low nanometer scale, much smaller than the present state of art size of the smallest transistor. This paper presents design and layout of novel XOR gate implementations with minimum complexity and cell count in comparison with the already proposed designs. We present here QCA implementation of combinational circuits like parity generator and checker based on the proposed XOR gate designs. The proposed designs were verified using simulation from QCA designer tool. These algorithms and simulations are useful for building more complex circuits based on QCA.