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An FPGA-based real-time UAV SAR raw signal simulator

机译:基于FPGA的实时无人机SAR原始信号模拟器

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References(8) Faced with the high computational complexity of UAV SAR raw signal simulators, a multi-FPGA system is developed. The system is based on a time-domain raw signal algorithm which can compute in real time and can be used for closed-loop simulation. In order to improve the efficiency of the SAR slant range computing, a modified non-restoring squire root algorithm for FPGA is designed. An improved method is presented to perform coherent accumulation of raw signal to decrease memory cost. The pipelined FFT and IFFT are used to compute the convolution in order to reduce delay. The SAR raw signal generation system is implemented and verified with real-time performance. It can simulate an imaging scene size of 640 * 640 point scatters with a PRF higher than 40 kHz.
机译:参考文献(8)面对无人机SAR原始信号模拟器的高计算复杂性,开发了一种多FPGA系统。该系统基于时域原始信号算法,该算法可以实时计算并可用于闭环仿真。为了提高SAR斜距计算的效率,设计了一种改进的FPGA非恢复源极根算法。提出了一种改进的方法来执行原始信号的相干累加以降低存储成本。流水线FFT和IFFT用于计算卷积以减少延迟。 SAR原始信号生成系统的实施和验证具有实时性。它可以模拟PRF高于40 kHz的640 * 640点散射的成像场景大小。

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