A Novel Load Regulation Technique for Power-SoC with Parallel-Connected POLs

摘要

This paper presents a novel load regulation technique for parallel-connected POLs which reads for power supply on chip (power-SoC). In power-SoCs, many POLs are implemented on the same chip. In this case, the conventional loop control (feedback control) may have problems such as oscillation. The proposed strategy regulates the output voltage by changing the number of working POLs under fixed duty ratio. The parallely connected POL system is implemented using MATLAB/Simulink, and the operating characteristics are confirmed. In addition, the proposed control strategy is also verified experimentally.