High performance and area efficiency design of global register file for coarse-grained reconfigurable cryptographic processor

摘要

References(10) The global register files (GRF) seriously affect performance and area of coarse-grained reconfigurable cryptographic processor (CGRCP). By studying the direct factors affecting the performance of GRF and the characteristics of block cipher algorithms implemented on CGRCP, a distributed whole interconnected global register files (DWI-GRF) was proposed. Compared with other GRF architecture with 14 mainstream block cipher algorithms as the experimental benchmarks, the average performance improved up to 17.24%～230.67% and average area efficiency improved from 36.37%～95.59% respectively.