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FPGA controlled five level soft switching full bridge DC-DC converter for high power applications

机译:FPGA控制的五电平软开关全桥DC-DC转换器,用于大功率应用

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The objective of the paper is to develop soft switching for the novel five level full bridge DC-DC converter for high power applications. The use of conventional DC-DC converter is likely to decrease the efficiency because of the hard switching, which generates losses during the switch on/off. This paper mainly deals with the development of zero voltage and zero current switching for five level full bridge DC-DC converter. The proposed topology will provide five level DC-DC output voltage, thereby the size of filter in both input and out sides will get reduced as compared to the existing topologies. By increasing the voltage levels, the stress across each switch and DC filter in the rectifier side will get reduced. Only eight switches are used for generating five levels in the proposed converter topology which reduces cost and also total switching losses, thus improves the overall efficiency of a system and it is very much suitable for high power DC-DC applications. The control signals for the proposed converter are developed from the Field Programmable Gate Array. The simulation and experimental results are presented for prototype model of 500?W.
机译:本文的目的是为新型大功率应用的五电平全桥DC-DC转换器开发软开关。由于硬开关,使用传统的DC-DC转换器很可能会降低效率,这会在接通/断开期间产生损耗。本文主要研究五电平全桥DC-DC转换器的零电压和零电流开关的发展。拟议的拓扑将提供五电平的DC-DC输出电压,从而与现有拓扑相比,输入和输出侧的滤波器尺寸都会减小。通过提高电压水平,整流器侧每个开关和直流滤波器两端的应力将得到降低。在建议的转换器拓扑中,仅使用八个开关来生成五个电平,这不仅降低了成本,而且还降低了总开关损耗,从而提高了系统的整体效率,非常适合大功率DC-DC应用。拟议转换器的控制信号是从现场可编程门阵列开发的。给出了500?W原型模型的仿真和实验结果。

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