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A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing

机译:用于卫星有效载荷处理的新型容错和运行时可重配置平台

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Reconfigurable hardware is gaining a steadily growing interest in the domain of space applications. The ability to reconfigure the information processing infrastructure at runtime together with the high computational power of today's FPGA architectures at relatively low power makes these devices interesting candidates for data processing in space applications. Partial dynamic reconfiguration of FPGAs enables maximum flexibility and can be utilized for performance optimization, for improving energy efficiency, and for enhanced fault tolerance. To be able to prove the effectiveness of these novel approaches for satellite payload processing, a highly scalable prototyping environment has been developed, combining dynamically reconfigurable FPGAs with the required interfaces such as SpaceWire, MIL-STD-1553B, and SpaceFibre. The developed systems have been enabled to space harsh environments thanks to an analytical analysis of the radiation effects on its most critical reconfigurable components. Aiming at that scope, a new algorithm for the analysis of critical radiation effects, in particular, related to Single Event Upsets (SEUs) and Multiple Event Upsets (MEUs) has been developed to obtain an effective estimation of the radiation impact and enabling the tuning of the component mapping reducing the routing interaction between the reconfigurable placed modules in their different feasible positions. The experimental performance of the system has been evaluated by a proper dynamic reconfiguration scenario, demonstrating a partial reconfiguration at 400 MByte/s, blind and readback scrubbing is supported and the scrub rate can be adapted individually for different parts of the design. The fault tolerance capability has been proven by means of a new analysis algorithm and by fault injection campaigns of SEUs and MCUs into the FPGA configuration memory.
机译:可重构硬件在空间应用领域中的兴趣正在稳步增长。能够在运行时重新配置信息处理基础架构的能力,以及以相对较低的功耗提供当今FPGA架构的高计算能力,使得这些器件成为空间应用中数据处理的有趣候选对象。 FPGA的部分动态重新配置可实现最大的灵活性,并可用于性能优化,提高能效和增强容错能力。为了能够证明这些新颖方法对卫星有效载荷处理的有效性,已经开发了高度可扩展的原型开发环境,将动态可重新配置的FPGA与所需接口(例如SpaceWire,MIL-STD-1553B和SpaceFibre)相结合。通过对辐射对其最关键的可重新配置组件的影响进行分析,从而使开发的系统能够在恶劣的环境中工作。针对该范围,已经开发了一种用于分析关键辐射效应的新算法,特别是与单事件扰动(SEU)和多事件扰动(MEU)相关的算法,以获得对辐射影响的有效估计并可以进行调整组件映射的示意图减少了可重配置放置的模块在其不同可行位置之间的路由交互。系统的实验性能已通过适当的动态重新配置方案进行了评估,表明以400 MByte / s的速度进行了部分重新配置,支持盲读和回读清理,并且清理率可以针对设计的不同部分进行单独调整。借助于新的分析算法以及SEU和MCU的故障注入活动已将其注入FPGA配置存储器中,证明了其容错能力。

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