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Inter-core Prefetching for Multicore Processors Using Migrating Helper Threads

机译:使用迁移助手线程进行多核处理器的内核间预取

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Multicore processors have become ubiquitous in today's systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications with large serial components. The challenge, then, is to develop techniques that allow multiple cores to work in concert to accelerate a single thread. This paper describes inter-core prefetching, a technique to exploit multiple cores to accelerate a single thread. Inter-core prefetching extends existing work on helper threads for SMT machines to multicore machines. Inter-core prefetching uses one compute thread and one or more prefetching threads. The prefetching threads execute on cores that would otherwise be idle, prefetching the data that the compute thread will need. The compute thread then migrates between cores, following the path of the prefetch threads, and finds the data already waiting for it. Inter-core prefetching works with existing hardware and existing instruction set architectures. Using a range of state-of-the-art multiprocessors, this paper characterizes the potential benefits of the technique with microbenchmarks and then measures its impact on a range of memory intensive applications. The results show that inter-core prefetching improves performance by an average of 31 to 63%, depending on the architecture, and speeds up some applications by as much as 2.8×. It also demonstrates that inter-core prefetching reduces energy consumption by between 11 and 26% on average.
机译:在当今的系统中,多核处理器已变得无处不在,但要利用它们提供的并行性仍然很困难,尤其是对于传统应用程序和具有大型串行组件的应用程序而言。因此,挑战在于开发允许多个内核协同工作以加速单个线程的技术。本文介绍了内核间预取,这是一种利用多个内核来加速单个线程的技术。内核间预取将SMT计算机的辅助线程上的现有工作扩展到多核计算机。内核间预取使用一个计算线程和一个或多个预取线程。预取线程在原本会空闲的内核上执行,预取计算线程所需的数据。然后,计算线程遵循预取线程的路径在内核之间迁移,并找到已经在等待数据的数据。内核间预取可与现有硬件和现有指令集体系结构一起使用。本文使用一系列最先进的多处理器,通过微基准来表征该技术的潜在优势,然后测量其对一系列内存密集型应用程序的影响。结果表明,取决于体系结构,内核间预取平均将性能提高31%到63%,并使某些应用程序的速度提高2.8倍。它还表明,内核间预取平均将能耗降低了11%至26%。

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