Traffic management for an ATM switch with per-VC queuing: concept and implementation

摘要

The services to be supported by an asynchronous transfer mode (ATM)-based multiservice network differ significantly in terms of their traffic characteristics and required quality of service. During the last few years it has been broadly accepted that efficient use of transmission capacity is not possible unless these differences are reflected in the way the related traffic streams are handled within the ATM layer. To address this need, the ATM Forum and ITU-T have specified different real-time and non-real-time ATM-layer service categories. This article first discusses the requirements for traffic management in a switch supporting all these service categories from the service providers' and users' points of view. The first generation of ATM switches, typically equipped with small cell buffers, only satisfies the requirements for the real-time service categories (CBR, rt-VBR). Statistical multiplexing, if supported at all, is limited to connections with low peak cell rates. Larger cell buffers and new traffic control functions are required to support non-real-time service categories (nrt-VBR, ABR, UBR). A switch architecture which is scalable from small to large system sizes is presented. It provides the required buffering and additional functions for the non-real-time service categories with the aid of a statistical multiplexing unit (SMU), a module which can also be used as an optional addition to a conventional ATM switch. The focus is on the functional description of two novel yet key components of the SMU, namely the buffer management and cell scheduling functions. The buffer management function provides per-VC queuing and achieves an optimal utilization of the large cell buffer shared by connections of different service categories. The two-stage cell scheduling function supports traffic shaping on the VC and VP levels, and weighted fair queuing within groups of connections. The overall concept supports high link utilization, fairness, and throughput guarantees, and enables a migration from today's ATM networks to a fully integrated multiservice network. Finally, implementation aspects are discussed to show the feasibility of the concept for very high bit rates.