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首页> 外文期刊>Communications, IEEE Transactions on >Finite-Order Source and Relay Filtering Design for Wideband Full-Duplex Amplify-and-Forward Relaying Networks
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Finite-Order Source and Relay Filtering Design for Wideband Full-Duplex Amplify-and-Forward Relaying Networks

机译:宽带全双工放大和前进式中继网络有限阶源和继电器滤波设计

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摘要

Compared with half-duplex relaying, the full-duplex relay (FDR) system provides higher spectral efficiency due to the concurrent transmission and reception at the relay node. As known, the full-duplex operation will introduce the self-interference (SI) that significantly degrades the system performance. Conventionally, SI is treated as a harmful signal that needs to be removed from the system as completely as possible. The conventional design concept, however, may not be efficient since SI is in fact a delayed version of the desired signal. Specifically, it is possible to have further performance improvement if SI can be exploited appropriately. In this paper, we will investigate the source/relay filter design problem where the source and relay are considered as finite impulse response (FIR) and infinite impulse response (IIR) filters, respectively. The design goal is to optimize the end-to-end performance for the linear minimum mean-square error (MMSE) and nonlinear MMSE decision-feedback equalizers. To reduce the implementation cost, we further propose a finite-order filter design for the source and relay precoders. Simulations demonstrate that our designs outperform the conventional ones.
机译:与半双工中继相比,由于中继节点处的并发传输和接收,全双工继电器(FDR)系统提供更高的光谱效率。如已知的,全双工操作将引入显着降低系统性能的自干扰(SI)。传统上,Si被视为需要尽可能完全从系统中移除的有害信号。然而,传统的设计概念可能不是有效的,因为SI实际上是所需信号的延迟版本。具体地,如果可以适当地利用Si,则可以具有进一步的性能改善。在本文中,我们将研究源和继电器的设计问题,其中源和继电器被视为有限脉冲响应(FIR)和无限脉冲响应(IIR)过滤器。设计目标是优化线性最小均方误差(MMSE)和非线性MMSE决策反馈均衡器的端到端性能。为降低实施成本,我们进一步提出了用于源和继电器预编码器的有限级滤波器设计。模拟表明我们的设计优于传统的设计。

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