Analytical drain current model of strained junctionless nanowire tunnel field‐effect transistor fabricated on urn:x-wiley:1751858X:media:cds2bf00056:cds2bf00056-math-0001 virtual substrate

摘要

This study proposes an analytical drain model of the strained junctionless nanowire tunnel field-effect transistor fabricated on the Si1-xGex virtual substrate. The surface potential is derived by solving Poisson's equation in the channel region. Effects of the strained silicon on the potential profile can be expressed as a function of the Ge concentration in the Si1-xGex virtual substrate. An analytical expression for the drain current is derived by using the tangent line approximation method. The strain induced in the device could reduce the effective tunnelling barrier significantly, resulting in a larger band-to-band tunnelling generation rate and, therefore, higher drive current compared with the unstrained device. Impacts of device parameters such as the channel diameter, gate oxide thickness and gate dielectric constant on the device performance are investigated. Results of the proposed model are verified by comparing with the device simulator.