A 9Gb/s Wide Output Range Transmitter With 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces

摘要

This brief presents a 9Gb/s transmitter for intra-panel interfaces, with dual-loop calibration and a 2D binary-segmented driver. The dual-loop calibration during the training period compensates the transmitter output for the variations in operating conditions such as supply voltage and reference current. The 2D binary-segmented driver provides wide range and high resolution output characteristics, and independent adjustments for V-OD, V-CM and FFE strength while maintaining signal integrity. The transmitter reduces power consumption by optimizing the output for the channel. A prototype chip, fabricated in a 55nm CMOS process, occupies 0.057mm(2). It provides FFE strength from 0dB to 26.4dB, common-mode voltage from 260mV to 690mV, and differential output voltage from 100mV(ppd) to 1200mV(ppd), which varies by less than 4% across supply voltage and reference current variations. It also consumes 36mW at a data-rate of 9Gb/s with a 1.2V supply.