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Effectiveness of embedded capacitors in reducing the number of surface mount capacitors for decoupling applications

机译:嵌入式电容器在减少用于去耦应用的表面安装电容器数量方面的有效性

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摘要

Purpose - The purpose of this paper is to present an analytical approach to find the reduction in the required number of surface mount capacitors by the use of embedded capacitors in decoupling applications.rnDesign/methodology/approach - The analytical model used to perform decoupling is cavity model from theory of microstrip antenna and N-port impedance matrix. The methodology involves addition of decoupling capacitors between the power and the ground plane such that the impedance between ports on the power-ground plane becomes lower than the target impedance at that frequency. A case study is presented in which a 0.3 m × 0.3 m power-ground plane is decoupled by using various combinations of surface mount capacitors and embedded capacitors in the frequency range of 0.001-1 GHz and at a target impedance of 0.1, 0.01, and 0.001 fi. The total number of surface mount capacitors are compared in each case. Findings - Use of embedded planar capacitors with a thin dielectric (about 8 mm) dampened board resonances at high frequency, as compared to a thick dielectric. Embedded capacitors are found to reduce the number of surface mount capacitors when the target impedance is low and the operating frequency is high.rnResearch limitations/implications - The methodology discusses in this paper is applicable to a simplified power-ground plane (which has no cutouts and is rectangular in shape) as compared to actual digital circuits.rnOriginality/value - This methodology can be used as a quick preliminary tool to evaluate the decrease in the number of surface mount capacitors (by the use of embedded capacitors) as compared to complex and time consuming electromagnetic solvers.
机译:目的-本文的目的是提出一种分析方法,以通过在去耦应用中使用嵌入式电容器来减少所需的表面安装电容器数量.rn设计/方法/方法-用于执行去耦的分析模型是空腔微带天线和N端口阻抗矩阵的理论模型。该方法包括在电源和接地平面之间添加去耦电容器,以使电源接地平面上端口之间的阻抗变得低于该频率下的目标阻抗。提出了一个案例研究,其中通过使用频率范围为0.001-1 GHz且目标阻抗为0.1、0.01和1.0的表面贴装电容器和嵌入式电容器的各种组合,将0.3 m×0.3 m的电源接地平面去耦。 0.001 fi。分别比较表面贴装电容器的总数。发现-与较厚的电介质相比,使用具有较薄电介质(约8毫米)的嵌入式平面电容器可以抑制高频时的板谐振。当目标阻抗低且工作频率高时,嵌入式电容器可以减少表面安装电容器的数量。研究限制/含义-本文中讨论的方法适用于简化的电源接地层(无切口)与原始数字电路相比,其形状为矩形)。rn/原始值/值-该方法可用作评估与表面贴装电容器(通过使用嵌入式电容器)相比减少的表面安装电容器数量减少的快速初步工具。和费时的电磁求解器。

著录项

  • 来源
    《Circuit World》 |2010年第1期|22-30|共9页
  • 作者单位

    Center for Advanced Life Cycle Engineering (CALCE), University of Maryland, College Park, Maryland, USA;

    Center for Advanced Life Cycle Engineering (CALCE), University of Maryland, College Park, Maryland, USA;

    Center for Advanced Life Cycle Engineering (CALCE), University of Maryland, College Park, Maryland, USA;

    Center for Advanced Life Cycle Engineering (CALCE), University of Maryland, College Park, Maryland, USA and Prognostics and Health Management Center, City University of Hong Kong, Kowloon, Hong Kong;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    capacitors; surface mount technology; resonance; electrical impedance;

    机译:电容器;表面贴装技术;谐振;电阻抗;
  • 入库时间 2022-08-18 01:18:23

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