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ON-LINE TESTING AND DIAGNOSIS OF MICROCONTROLLERS

机译:单片机的在线测试与诊断

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During its lifetime, a digital system is tested and diagnosed on numerous occasions. For the system to perform its intended mission with high availability, testing and diagnosis must be quick and effective. A sensible way to ensure this is to specify testing as one of the system functions- in other words, self-test. Reliability, availability, and serviceability (RAS) are the major factors for consideration in system design to provide continuous correct operation [1]. Since faults cannot be completely eliminated, critical systems always employ fault tolerance techniques to guarantee high reliability and availability. Fault tolerance (FT) techniques try to keep the system operational despite the presence of faults [2]. FT can be achieved through hiding the occurrence of faults and preventing it from generating errors (fault-masking), or through fault detection and fault repairing. Technological advances have made it possible to integrate on a single chip enormous numbers of transistors, thus allowing the inclusion on a single chip of entire systems, including microprocessors (MP), microcontroller (MC), memories, ASICs, and peripherals. The development of this new class of systems is called Systems on Chip (SoCs) [3]. Testing is a crucial issue in the SoC development and production processes. The internal structure of a MP is based on a sequentially complex decode and control unit that decodes the instructions and sends the appropriate control signals to a large data-path, which may include hard-to-test elements such as multipliers and dividers [4]. Here, the decode and control unit can be seen as a complex finite state machine (FSM) and its test requires suitable sequences to traverse its state graph to excite and observe possible faults. Therefore, its test is mainly a sequential problem. Finally, test sequence generation for MP necessarily requires knowledge of the processor instruction set and instruction format, since only correct programs can internally perform meaningful operations.
机译:在其整个生命周期中,都会对数字系统进行多次测试和诊断。为了使系统以高可用性执行其预期任务,测试和诊断必须快速有效。确保这一点的明智方法是将测试指定为系统功能之一,即自测。可靠性,可用性和可维护性(RAS)是系统设计中考虑提供连续正确操作的主要因素[1]。由于无法完全消除故障,因此关键系统始终采用容错技术来保证高可靠性和可用性。尽管存在故障,容错(FT)技术仍试图使系统保持运行[2]。 FT可以通过隐藏故障的发生并防止其产生错误(故障掩盖),或者通过故障检测和故障修复来实现。技术的进步使得在单个芯片上集成大量晶体管成为可能,从而允许在整个系统的单个芯片中包含整个系统,包括微处理器(MP),微控制器(MC),存储器,ASIC和外围设备。这类新系统的开发称为片上系统(SoC)[3]。测试是SoC开发和生产过程中的关键问题。 MP的内部结构基于顺序复杂的解码和控制单元,该单元解码指令并将适当的控制信号发送到大型数据路径,该路径可能包含难以测试的元素,例如乘法器和除法器[4]。 。在这里,解码和控制单元可以看作是一个复杂的有限状态机(FSM),其测试需要适当的序列来遍历其状态图​​以激发并观察可能的故障。因此,其测试主要是一个顺序问题。最后,由于只有正确的程序才能在内部执行有意义的操作,所以针对MP的测试序列生成必然需要处理器指令集和指令格式的知识。

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