Cascade linear phase recursive half-band filters implement the most efficient digital down converter

摘要

The digital down converter (DDC) is a fundamental component in modern DSP based receivers. The basic architecture is the DSP implementation of the Edwin Armstrong heterodyne circuit. It is formed by three processes, a quadrature heterodyne, a pair of low-pass filters, and an M-to-1 down sampler. The index M is the ratio of input to output bandwidth of the filtering process. When M is large, the filtering is often performed in two sub-filters: a cascade integrator comb (CIC) filter that performs most of the down sampling followed by a pair of half-band filters that perform spectral correction, some final bandwidth reduction, and the remainder of the down-sampling. The attraction of the CIC filter is that it performs the filtering without multiplies. In this paper we present two alternate filter structures that offer significant computational advantages over the conventional CIC based DDC. These architectures offer the minimum power implementation of a DDC and likely will find great value in battery operated radio receivers.