“Skip–Swap” method instead of “Skip–Fill” method in background calibration of pipelined ADCs

摘要

This paper presents a new background calibration technique employing an extra slow but accurate ADC for correcting the linear and nonlinear gain errors in pipelined ADCs. In comparison to the well-known skip–fill method, the proposed skip–swap algorithm enables the calibration of the pipelined ADC with low power consumption and fast convergence, while usable in Nyquist frequencies with low SNDR degradation. The simulation results for a behaviorally modeled 12-bit 200MS/s 1.5bit/stage pipelined ADC show the improvement of DNL and INL from 88.2 and 209 LSB to 0.89 and 1.06 LSB, respectively. The ADC achieves a SNDR of 72.5 dB after calibration.