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Toward a Reduced-Wire Readout System for Ultrasound Imaging

机译:面向用于超声成像的线规缩减读取系统

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摘要

We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply.
机译:我们提出了一种片上系统(SoC),用于高频电容微加工超声换能器(CMUT)成像系统。该SoC由互阻放大器(TIA),基于延迟锁定环(DLL)的时钟乘法器,正交采样器和脉宽调制器(PWM)组成。 SoC通过正交采样将RF回波信号下变频为基带,从而有助于调制。为了通过带宽有限且易受噪声影响的导管中的1.6 m导线发送数据,SoC会创建一个伪数字PWM信号,该信号可用于反遥测或无线读取RF数据。在此实现中,使用0.35-μmstd。 CMOS工艺,TIA和单到差分(STD)转换器具有45 MHz带宽,正交采样器具有10.1 dB的转换增益,而PWM具有5位ENoB。初步结果验证了前端功能,并且3V电源的TIA,STD,正交采样器,PWM和时钟乘法器的功耗为26 mW。

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