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Test of a 32-channel Prototype ASIC for Photon Counting Application

机译:用于光子计数应用的32通道原型ASIC的测试

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摘要

A new low-power application-specific integrated circuit (ASIC) for Cadmium Zinc Telluride (CZT) detectors for single-photon emission computed tomography (SPECT) application is being developed at BNL. As the first step, a 32-channel prototype ASIC was designed and tested recently. Each channel has a preamplifier followed by CR-RC3 shaping circuits and three independent energy bins with comparators and 16-bit counters. The ASIC was fabricated with TSMC 0.35-μm complementary metal–oxide–semiconductor (CMOS) process and tested in laboratories. The power consumption is around 1 mW/ch with a 2.5-V supply. With a gain of 400 mV/fC and the peaking time of 500 ns, the equivalent noise charge (ENC) of 360 e- has been measured in room temperature while the crosstalk rate is less than 0.3%. The 10-bit DACs for global thresholds have an integral nonlinearity (INL) less than 0.56% and differential nonlinearity (DNL) less than 0.33%. In the presentation, we will report the detailed test results with this ASIC.
机译:BNL正在开发一种用于单光子发射计算机断层扫描(SPECT)应用的新型碲化镉锌(CZT)检测器的低功耗专用集成电路(ASIC)。第一步,最近设计并测试了32通道原型ASIC。每个通道都有一个前置放大器,其后是CR-RC 3 整形电路,以及三个具有比较器和16位计数器的独立能量仓。 ASIC是采用台积电0.35-μm互补金属氧化物半导体(CMOS)工艺制造的,并在实验室中进行了测试。使用2.5V电源时,功耗约为1 mW / ch。增益为400 mV / fC,峰值时间为500 ns,在室温下测得的等效噪声电荷(ENC)为360 e-,而串扰率小于0.3%。用于全局阈值的10位DAC的积分非线性(INL)小于0.56%,差分非线性(DNL)小于0.33%。在演示中,我们将使用该ASIC报告详细的测试结果。

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