Designing an Ethernet switch that can assure normal interaction of protocol packets between switches in a network environment of massive traffic is an important matter. Taking the L3 Ethernet switch based on Application Specific Integrated Circuit (ASIC) as an example,this article analyzes several typical issues about packet receiving and sending by the CPU in a multi-progress environment,including CPU load,software and hardware queue settings,and communication mechanism between CPU and the switch chip. This article gives solutions to these issues mentioned above. The solutions are applicable to Network Processor (NP) issues as well.
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