A schem e to design the interface betw een a high speed digital signal processor and liquid crystal display w as proposed. In this paper, the hardw are interface circuit and the softw are drivers procedures of the m ethod are designed .A s the tim ing ofD SP and LC D is notcom patible,and this problem is settled by configurat-ing the tim ing ofexternalinterface in D SP .The resultofexperim entindicated thatthis schem e m eetthe require-m ents of display stability.% 本文提出了一种高速D SP控制低速液晶显示模块的方案,并给出了该方案的硬件接口设计和软件实现。本文分析液晶模块及D SP的时序,并通过配置D SP外设接口模块时序解决二者时序不匹配的问题。实验调试表明,本方案可以稳定地驱动液晶显示模块。
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