基于VXI总线的时钟测量模块

摘要

A design of clock measurement module is introduced in thisarticle. This VXIbus module is implemented based on techniques of high speed data acquisition and digital signal processing, its sampling rate is 500 Msps and time resolution is 2 ns.%介绍了一个时钟测量模块的设计,该模块是基于高速数据采集和数字信号处理的VXI测试模块,该模块的采样率高达500Msps,时间分辨为20ns。