高性能晶体振荡器及频率校准电路设计

摘要

设计了一种高性能Pierce晶体振荡器及频率校准电路。采用耗尽型NMOS管实现低功耗的1.5 V基准电压，晶体振荡电路采用基准电压供电，降低了振荡器的功耗同时提高输出频率的精度。为了进一步提高输出频率的精度，芯片内部集成熔丝修调电路，通过校正晶振负载电容，实现芯片封装后振荡电路输出频率的校准，校准范围为（-52.216 ppm，54.962 ppm），校准最大步长为3.723 ppm。增加数字方式校准电路，在具有温度检测功能的系统中，可以扩展实现计时的温度补偿功能，提高芯片的计时精度，校准范围为（-189.100 ppm，189.100 ppm），校准步长为3.050 ppm。电路在0.5μm-5 V CMOS工艺上实现。整个时钟芯片版图面积为0.842 mm×0.996 mm。%A high-performance Pierce crystal oscillator and frequency calibration circuit were designed. A depletion mode NMOS transistor is used to obtain 1.5 V output reference circuit with low-power dissipation. Crystal oscillating circuit uses a power supply of 1.5 V reference voltage to reduce the power consumption and improve the output frequency precision of the oscillator. In order to further increase the output frequency precision,fuse trimming circuit is integrated inside chip. The correction of the oscillating circuit output frequency after packaging is realized by adjustment of the crystal oscillator load capacitance. The correction range is -52.216~54.962 ppm,and the maximum correction step is 3.723 ppm. If the correction circuit of digital mode is inte-grated in the chip,this function can be used to correct temperature-related clock precision variation in system,including tempe-rature detection function. The correction range is -189.1~189.1 ppm,and the correction step is 3.05 ppm. A practical circuit is realized in a 0.5 μm-5 V COMS process. The die size is 0.842 mm×0.996 mm.