一种基于FPGA的信号发生器设计实现

摘要

VHDL language and QuartusII software application of the principle diagram provided input,combined with electronic circuit design function of the design to complete a can be used in the digital system development or experiment do input pulse signal or benchmark pulse signal with the signal generator,it has compact structure,stable performance,the structure design is flexible,convenient for the characteristics of the multi-functional combination,economic and practical,low cost.%应用VHDL语言及QuartusII软件提供的原理图输入设计功能,结合电子线路的设计加以完成一个可应用于数字系统开发或实验时做输入脉冲信号或基准脉冲信号用的信号发生器,它具有结构紧凑,性能稳定,设计结构灵活,方便进行多功能组合的特点,经济实用,成本低廉。