为解决复合天线通信系统使用均匀信道分解(UCD)的预编码/空时分组编码(STBC)技术改善系统误码性能的同时降低数据传输速率的问题,提出一种新的包含UCD和UCD+STBC技术的自适应收发器架构.通过增加信道状态信息(CSI)反馈回路至预编码器,实现系统采用单独的UCD或UCD+STBC编码工作模式的选择.Matlab仿真结果显示,在较小星座图条件下,自适应收发器架构在高信噪比状态时,通过选择UCD工作模式,保证系统具有较高的数据传输速率.在低信噪比状态时(如信噪比小于10 dB),系统通过选择UCD+STBC工作模式,以降低数据传输速率为代价保证系统具有较好的误码率性能.该体系结构通过UMC 0.18 ASIC工艺和Xilinx xc4vlx Virtex-4 FPGA在工作频率150 MHz条件下实现并验证.结果表明,所需的可重构算术单元与信道矩阵大小成线性增长,而加阵列单元和可重构逻辑单元的数目随星座图大小的增加而略有增加.%Precoding and space-time block coding (STBC) techniques using the uniform channel decomposition (UCD) are proposed to improve the bit error rate (BER) of the multiple-antenna communication system, but at a cost of a reduced data rate. In order to achieve a higher overall system performance, a novel adaptive transceiver architecture which flexibly combines both UCD and UCD+STBC technologies is proposed. The channel state information (CSI) feedback path was added to the precoder to select which coding method was to be used, i. e. UCD alone or UCD + STBC. With the smaller constellation sizes, Matlab simulation results show that, the adaptive transceiver architecture will select the UCD-only mode under the higher SNR conditions in order to achieve a higher bit rate. The UCD +STBC mode will be selected under the lower SNR conditions (e.g., SNR < 10 dB) in order to maintain good BER performance at the cost of a reduced data rate. This architecture was implemented and verified using both UMC 0.18 ASIC process technology and a Xilinx xc4vlx Virtex-4 FPGA at 150 MHz. The simulation results demonstrate that the required number of reconfigurable arithmetic unit slices grows linearly with the channel matrix size, while the number of adder array unit and reconfigurable logic unit slices increases slightly with the constellation size.
展开▼
