Examine the Stability Margin of Cascade Circuits

摘要

This paper proposes an engineering approach to examine the stability margin of cascade circuits. The proposed measurement injects an external perturbation current into the cascade interface and measures the load-side response current. The system stability margin can be figured out by comparing the magnitudes of the perturbation current and the response current. The proposed measurement is strictly derived in theory, implemented with details, and demonstrated by experiment.