高速视频系统中一种异步FIFO缓存设计

摘要

在数字电视系统中,为了满足系统对高速数据的采集的缓存需求,通过研究FIFO的工作原理,利用FPGA和SDRAM设计了一种高速大容量的异步FIFO.介绍了SDRAM的存储结构及操作方法,阐述了基于SDRAM控制器的异步FIFO的设计方法,结合实际,完成了在数字电视系统中基于FPGA和SDRAM的大容量异步FIFO的设计与实现,有效的解决了数字电视系统中对高速视频处理时的海量缓存问题.%In the digital television system, in order to meet the cache needs of high-speed data acquisition, we first research the principle of FIFO, then design a high-speed large-capacity asynchronous FIFO with FPGA and SDRAM. This paper describes the structure and method of operation of the SDRAM memory, describes the method large-capacity asynchronous FIFO based on SDRAM Controller, combined with practical, completion the design and realization of high-capacity asynchronous FIFO based on FPGA and SDRAM in the digital television system, solve the massive cache problems on high-speed video and digital TV system effectively.