Design and realization of a high productivity cluster-based network application reconfigurable accelerator board

摘要

Improving processor frequency to strengthen massive data processing capability will lead to incremen-tal server marginal costs and bring about a series of problems such as power consumption,managementcomplexity,etc.Based on the field programmable gate array(FPGA),TCP offload engine(TOE),zero-copy and other key technologies,this paper describes the design and realization of a reconfigurable accel-erator board.In this board,TCP/IP protocol will be moved to high-speed reconfigurable acceleratorboard.The packets will be labeled according to the protocol and submitted to the upper data processingsoftware after IP-quintuple filtering in hardware.Reconfigurable accelerator board obtains higher perfor-mance speed-up compared with ordinary NIC card.