A 10 Gb/s 6-tap transmit equalizer based on partial response signaling for high speed backplane transmission is presented.By combining features of equalizer and frequency-dependent channel, duobinary signaling can be generated at the output of FR4 backplane, aiming at increasing data rate while reducing design complexity.Based on 0.18μm CMOS technology, this equalizer has been de-signed and fabricated, in which both variable capacitor and load resistor calibration techniques are explored to eliminate the effect of process variations.The chip occupies 0.68 ×0.8mm2 including I/O pads and consumes a power of 194mW with 1.8V power supply.Measurement results show that a typical 3-level eye diagram can be obtained at the receiver and the equalizer can work properly at the data rate of 10Gb/s.
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机译:提出了一种基于部分响应信令的10 Gb / s 6抽头发射均衡器,用于高速背板传输。结合均衡器和频率相关通道的特性,可以在FR4背板的输出端生成双二进制信令,旨在增加数据传输量该均衡器基于0.18μmCMOS技术进行了设计和制造,同时探索了可变电容器和负载电阻校准技术以消除工艺变化的影响,芯片占用0.68×0.8mm2的面积。包括I / O焊盘在内,使用1.8V电源时功耗为194mW。测量结果表明,可以在接收器处获得典型的3级眼图,并且均衡器可以在10Gb / s的数据速率下正常工作。
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