基于 FPGA 的虚拟逻辑分析仪的设计与实现

摘要

介绍一种基于FPGA芯片的虚拟逻辑分析仪，它由信号调整电路、采样模块、触发模块、通信模块、数据处理模块（ NIOS II软核）以及总线接口等组成，实现了8路并行采样，其采样速率可以达到100 MS/s。%This paper introduces a virtual logic analyzer based on FPGA chip , which consists of signal conditioning circuit , sam-pling module, trigger module, communication module, NIOS Ⅱsoft-core, and bus interface.The 8-way parallel sampling is a-chieved.The sampling rate is up to 100MS/s.