In the design of passive Radio frequency（RF） tags’ baseband processor, subthreshold timing and wide-range-Process, voltage and temperature（PVT） variation problems are the bottlenecks to extend the tag’s working range. A sophisticated processor is presented based on the EPC and ISO protocol. Power-aware ideas are applied to the entire processor, including data link portions. Innovatively, a novel custom ratioed logic style is adopted in critical logic paths to fundamentally speed up the circuit operations at ultra-low-voltage. The proposed baseband processor was fabricated in 90 nm CMOS, another baseband processor design by regular standard-cell-based design flow was also fabricated for comparison. In measurement the proposed design indicates good robustness in wide-range supply and frequency variation and much more competent for subthreshold operation. It can operate at minimum 0.28 V supply with power consumption of129 n W.
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