信号采集中峰值检测电路的设计与实现

摘要

为实现信号采集中峰值检测,改进峰值检测电路的指标,提高峰值检测电路的速度,捕捉更窄的毛刺信号,使用VHDL语言来编写程序,设计了一种基于FPGA的峰值检测电路.采用串并转换的思想,先把采集到的数据做串并转换以降低速度,并使用流水线技术,提高了电路的工作速度,实现了峰值检测的功能.该电路在实际项目中得到了验证,能捕获2.5 ns以上的毛刺信号,可广泛用于数字存储示波器中.%In order to implement peak detection in signal acquisition, improve the speed and other performance index of the peak detection circuit, and catch narrower glitch signal, a kind of peak detection circuit based on FPGA was designed using the VHDL language to write programs.It adopts the idea of transforming serial data into parallel data to reduce speed firstly. Then it uses the technology of pipelining to improve the working speed of the circuit and realize the function of peak detection. The circuit has been verified in actual project. It can catch more than 2.5 ns glitch signal, and can be widely used in digital storage oscilloscope.