In this paper,an effective straegy of point multiplication scheduling and an improved algorithm of dual-field high radix Montgomery modular multiplication are proposed. Based on them,a new high-perfomance scalable public-key cipher coprocessor architecture for RSA and ECC computing acceleration is designed, which is implemented using the 0.18μn 1P6M standard CMOS technology. The coprocessor has strong scalability and flexibility, which can support the modular exponentiation up to 2048 hit and the dual-field elliptic curve scalar multiplication up to 576 bit by enlarging the high-speed memory on chip and using the radix-length as processing base. The measured result shows that the coprocessor essor chip has high performance for accelerating the computation of RSA and ECC and can perform one 1024-bit modular exponentiation only in 197μs, one the prime field 192-bit scalar multiplication only in 225μs and the binary field 163-bit scalar multiplication only in 200.7μs.%本文提出了一种高效的点乘调度策略和改进的双域高基Montgomery模乘算法,在此基础上设计了一种新型高性能可扩展公钥密码协处理器体系结构,并采用0.18μm 1P6M标准CMOS工艺实现了该协处理器,以支持RSA和ECC等公钥密码算法的计算加速.该协处理器通过扩展片上高速存储器和使用以基数为处理字长的方法,具有良好的可扩展性和较强的灵活性,支持2048位以内任意大数模幂运算以及576位以内双域任意椭圆曲线标量乘法运算.芯片测试结果表明其具有很好的加速性能,完成一次1024位模幂运算仅需197μs、GF(p)域192位标量乘法运算仅需225μs、GF(2m)域163位标量乘法运算仅需200.7μs.
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