Efficient Implementation of MIMO Detectors for Emerging Wireless Communication Standards.

摘要

MIMO (Multi-Input Multi-Output) wireless systems have been widely used in next-generation wireless systems, such as 802.11n, LTE (long-term evolution), and WiMAX. The use of multiple antennas at the transmitter and receiver significantly increases data throughput without utilizing additional bandwidth or transmission power. The extraction of the signal from the spatially multiplexed transmitted streams is a complex process. Many baseband signal processing algorithms have been developed, but sphere decoders are the most popular due to their near ML performance while achieving lower power and complexity.;The K-best algorithm which is one of the three types of SDs (fixed complexity sphere decoder, depth-first, and K-best) exhibits a fixed throughput while providing a BER performance close to ML in different SNRs. Furthermore, the K-best algorithm is very amenable for soft-output detection because it inherently generates the candidate list required to calculate the LLR (log-likelihood ratio) values for soft-output detection.;However, K-best designs in the literature use a multi-stage architecture that is not reconfigurable for different antenna configurations. Furthermore, the area of conventional multi-stage architectures increases quadratically with the number of antennas, reducing its efficiency for large antenna arrays.;This dissertation implements two architectures for the K-best algorithm: The multi-stage and in-place architectures. It also modifies this algorithm for an efficient hardware implementation. To reduce the complexity of the conventional multi-stage K-best architecture, the three-dimensional child reduction technique is proposed, which by discarding the un-necessary branches reduces the complexity of the detector. To eliminate the throughput bottle-neck of this architecture the parallel merge algorithm/architecture is proposed, which provides the shortest critical path among other merge architectures.;To add the flexibility of operation on different antenna sizes in run-time, the in-place architecture is proposed. This architecture suffers from low throughput therefore different methods are proposed to increase the throughput such as partial-sort-bypass strategy, symbol-interleaving and multi-core partitioning. The implementation of a soft-output 16-QAM system that works with antenna configurations from 2x2 to 4x4 is shown in chapter 4. Finally a modification to the in-place architecture for reducing the area is proposed and implemented for 64-QAM modulation.