Conception, synthesis, and integration: Custom-state machine TCP/IP offload engine and cryptosystem for isomorphic transformation and elliptic curve cryptography on an FPGA chip.

摘要

Embedded Systems are targeted recently in computer networks, communications, and security to achieve reliable and secure date communication at Gigabit speeds. The connection-oriented Transmission Control Protocol/Internet Protocol (TCP/IP) has been offloaded onto Instruction-based processors (e.g.; General-Purpose Processor (GPP), or Application Specific Instruction-set Processor ASIP) to help mitigate the TCP/IP processing overhead on the host CPU. Likewise, limited hardware cryptosystems were targeting hardware to encrypt/decrypt real-time data at a high-performance throughput. Instruction-based TCP/IP Offload Engine (TOE), GPP type, offers flexibility while reducing performance. In addition, the instruction-based TOE ASIP type, while consumes less power, and occupies less size than the GPP type, it still follows a sequential behavior. Elliptic Curve Cryptography (ECC) is classified as an asymmetric scheme which has not been used to encrypt/decrypt a stream of real-time data because of the demands for : a deterministic method to map the real-time data to points in the Elliptic Curve (EC), a homomorphic method to apply EC mathematical operations on the data without losing its originality, and a high performance hardware cryptosystem to perform the mapping method, the EC point multiplication, and the encryption method. To overcome the drawbacks of either TOE GPP or ASIP type, we proposed to develop a Custom-state machine TOE which is designed using VHDL and then synthesized on an FPGA. The maximum throughput of our proposed TOE is 5.12 Gbps on Cyclone IV FPGA, which is 5 times better than recent benchmarks.;In addition, we crafted a new hardware architecture to map real-time data to points in the EC using isomorphic transformation under Koblitz curve defined over Galois Field GF(2163), and then we used the EC ElGamal method. The maximum throughput of the proposed cryptosystem is 29.29 Mbps. Finally, the proposed cryptosystem and TOE are joined together and synthesized on the same FPGA chip.