Hardware Trojans are malicious circuits which can be secretly implanted in integrated circuits by unscrupulous third party manufacturers for the purpose of spying or stealing information from the circuit. This has become a matter of concern with the increase in outsourcing of semiconductors which are used both in military and commercial sectors. It has been observed that due to the presence of process variation, environmental variation, and measurement noise; a stealthy Trojan may go undetected. In the first part of this thesis, we study the NOT and NAND based ring oscillators (ROs) as power monitors for detecting these Trojans. A network comprising of 7 ROs is implemented using the ISCAS85 c2670 benchmark on several Xilinx Spartan-3E FPGAs. The results demonstrate that the impact of Trojans on the frequency of nearby ROs is noticeably larger for NAND based structure compared to the NOT one, thus making the NAND based design more attractive for the detection of Trojans.;In the later part of our work, a circuit partitioning based approach is proposed which facilitates the detection of Trojans. The ratio of the power consumed by the Trojan to the power consumed by the host circuit plays a vital role in detection of Trojans using any power based side channel analysis method. Partitioning the circuit allows us to control the switching activity of the divided areas independently. Therefore, for a chip with uniform switching activity across the chip area, overall dynamic power consumption can be reduced to almost 1/n of the total dynamic power, if the chip is divided into n number of partitions. In this work, the circuit under authentication (CUA) is split into two sub circuits and the ring oscillators frequency values are observed while keeping one of the two sub circuits inactive. Experimental results show a higher percentage of change in the ring oscillators frequencies during the partial activation of CUA which magnifies the discrepancy between the Trojan free and Trojan inserted circuits.
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