Accuracy management for delay-oriented control in mixed-mode simulation of digital VLSI circuits.

摘要

Accuracy management is a delay-oriented control algorithm for mixed-mode VLSI timing simulation that determines computationally efficient means of analyzing different parts of a digital circuit based on a global accuracy requirement. For delay estimation, mixed-mode simulation can concentrate high accuracy analysis on circuit critical paths while faster, less rigorous methods are used elsewhere. There is a need to manage large numbers of subcircuits in the accuracy assignment process that is otherwise handled manually. Our solution focusses on circuit delay, as signal propagation time is a primary concern in high speed computing and telecommunications systems research. The method is developed for combinational circuits, but extendable to sequential circuits. By modelling isolated signal paths as simple chains, a set of heuristic algorithms were developed from an optimization of simulation accuracy requirements along a chain to meet output tolerance requirements. These heuristics are applied in linear-time analysis to determine accuracy requirements of all subcircuits. With error tolerance constrained by critical paths, noncritical side paths are afforded greater relative error tolerance that allows for analysis by more computationally efficient algorithms of lesser accuracy. Our theoretical predictions for reduced computational cost, reflecting faster computation, were first verified by mathematical modelling and then experimentally verified via simulations of standard benchmark circuits. Comparing mixed-mode trials against results from SPICE and waveform relaxation circuit simulation, no significant loss of accuracy in the calculated delays was found. Improvement in computation time ranged from half to one order of magnitude. Our results show that future simulators can automatically determine means of analysis for subcircuits based on overall accuracy specifications to efficiently provide high quality timing simulation for digital VLSI circuits.