Sigma-delta modulation for FM mobile radio.

摘要

This thesis presents VLSI architectures for frequency synthesizers and frequency and phase modulators and demodulators, realized using SD modulation techniques.; These building blocks use VLSI in order to achieve small size and low power dissipation. Over-sampling and noise shaping techniques are used to achieve robust architectures and to convert analog signals to the digital domain in order to take advantage of low cost digital-signal-processing techniques.; A high resolution fractional-N RIF frequency synthesizer is presented which is controlled by a fourth-order digital SD modulator. The high resolution allows the synthesizer to be digitally modulated directly at RF. A simplified digital filter which makes use of SD quantized tap coefficients is included which provides built in GMSK pulse shaping for data transmission. Quantization of the tap coefficients to single bit values not only simplifies the filter architecture but the fourth-order modulator as well.; The synthesizer makes use of custom VLSI with only a simple off chip loop filter and VCO. The synthesizer operates from a single three volt supply and the two chips consume a total of 32 mW. Phase noise levels are less than --90 dBc/Hz over a 19.6 MHz tuning range.; A receive path SD frequency-to-digital converter which makes use of only switched capacitor and digital circuit techniques is presented. The novel architecture used reduces the amount of out of band quantization noise for low deviation FM signals when compared to previous architectures and complements the GMSK transmitter described above. A hardware version of the frequency-to-digital converter has been designed in a 0.8 m m BiCMOS process to operate at an IF frequency of 112.5 MHz.