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Advancements in scanning probe lithography and nanostructure fabrication.

机译:扫描探针光刻和纳米结构制造方面的进展。

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This thesis is divided into three sections: (1) lithography techniques and development of a novel scanning probe lithography (SPL) system, (2) development of micro-machining technology for probe array fabrication, and (3) development of a localized carbon nanotube synthesis technique for integrating nanotube devices.; The two predominant methods of scanning probe lithography (SPL) are electric-field enhanced oxide pattern formation and resist exposure by field emitted electrons. Using the first method, one of the first functional electron devices (100 nm gate-length n-MOSFET) was fabricated using SPL and their electrical characteristics are presented. The limitations, such as slow scan-speeds and tip wear are addressed. An improved SPL system, which incorporates simultaneous force and current feedback to expose electron sensitive films, is demonstrated. The performance of this “Hybrid AFM/STM lithography system,” including resolution, overlay accuracy, critical dimension control, tip-wear, scan speed and its ability to pattern over underlying topography, is discussed. A 100 nm gate-length pMOSFET was fabricated using this system and its electrical performance was measured.; To increase the throughput of an SPL system, an array of scanning probes must operate in parallel. Previously, the operation of a one-dimensional linear array was demonstrated. To extend the probe array into two dimensions, micro-machining technology was developed for fabricating high-wiring density, through-wafer vias (TWV). The integration of the TWV with scanning probe arrays and an application of TWV to create novel three-dimensional integrated inductors on silicon is discussed.; Carbon nanotubes possess many electrical properties that make them a possible candidate material for novel molecular electronic devices. In this work, chemical vapor deposition (CVD) synthesis of high-yield, defect free, single-walled nanotubes (SWNTs) with controlled location is presented. In addition, we describe a fabrication technique to create low resistance contacts to the SWNTs, and report on their electrical characteristics. Finally, we describe a processing technique for vertically aligned synthesis of nanotubes, which may enable us to integrate them on to the tip of a scanning probe.
机译:本论文分为三个部分:(1)光刻技术和新型扫描探针光刻(SPL)系统的开发;(2)用于探针阵列制造的微加工技术的开发;(3)局部碳纳米管的开发用于集成纳米管器件的合成技术。扫描探针光刻(SPL)的两种主要方法是电场增强氧化物图案的形成和通过场发射电子进行的抗蚀剂曝光。使用第一种方法,使用SPL制造了一个第一功能电子器件(栅极长度为100 nm的n-MOSFET),并展示了它们的电特性。解决了诸如扫描速度慢和尖端磨损之类的限制。展示了一种改进的SPL系统,该系统结合了同时的力和电流反馈以曝光电子敏感膜。讨论了这种“混合式AFM / STM光刻系统”的性能,包括分辨率,覆盖层精度,关键尺寸控制,针头磨损,扫描速度及其在基础形貌上的图案化能力。使用该系统制造了100 nm栅极长度的pMOSFET,并测量了其电性能。为了提高SPL系统的吞吐量,扫描探针阵列必须并行运行。先前,已经说明了一维线性阵列的操作。为了将探针阵列扩展到二维,开发了微加工技术以制造高布线密度的晶圆通孔(TWV)。讨论了TWV与扫描探针阵列的集成以及TWV在硅上创建新型三维集成电感器的应用。碳纳米管具有许多电学特性,使其成为新型分子电子设备的候选材料。在这项工作中,提出了具有受控位置的高产率,无缺陷的单壁纳米管(SWNT)的化学气相沉积(CVD)合成。另外,我们描述了一种制造技术,以创建与SWNT的低电阻触点,并报告其电特性。最后,我们描述了用于垂直对齐的纳米管合成的处理技术,这可以使我们将其集成到扫描探针的尖端。

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