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A low-voltage fully monolithic SSB transmitter IC for 5--6 GHz WLAN.

机译:适用于5--6 GHz WLAN的低压完全单片SSB发送器IC。

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摘要

The subject of this thesis is the design and implementation of monolithic single-sideband (SSB) transmitter circuits for 5--6 GHz wireless local-area networks (WLANs). Experimental and simulation results for two fabricated circuits are reported: one in a 0.18 mum CMOS technology and another in SiGe BiCMOS. The CMOS circuit consists of a quadrature upconverter that incorporates a monolithic inductor to achieve low-voltage operation. Measured samples exhibit an upconversion gain of 12.5 dB, while dissipating 54 mW from the 1.8 V supply. In the SiGe BiCMOS design, the quadrature upconverter is augmented with an on-chip quadrature signal generator and transformer-coupled output stage to comprise a fully-monolithic SSB transmitter IC. Simulation results predict a 33.9 dB upconversion gain at an output power level of +3.9 dBm, while dissipating 30.8 mW from the 2.7 V supply. A novel on-chip quadrature phase-tuning circuit was integrated to improve upon the untuned sideband suppression of 37.2 dBc.
机译:本文的主题是用于5--6 GHz无线局域网(WLAN)的单片单边带(SSB)发射机电路的设计和实现。报告了两种装配电路的实验和仿真结果:一种采用0.18微米CMOS技术,另一种采用SiGe BiCMOS。 CMOS电路由一个正交上变频器组成,该正交上变频器结合了一个单片电感器以实现低压工作。被测样品的上变频增益为12.5 dB,而1.8 V电源的功耗为54 mW。在SiGe BiCMOS设计中,正交上变频器增加了片上正交信号发生器和变压器耦合输出级,以构成一个全单片SSB发送器IC。仿真结果预测,在+3.9 dBm的输出功率水平下,将获得33.9 dB的上变频增益,同时从2.7 V电源消耗30.8 mW的功率。集成了新颖的片上正交相位调谐电路,以改善37.2 dBc的未调谐边带抑制。

著录项

  • 作者

    Sdao, Mark Anthony.;

  • 作者单位

    University of Toronto (Canada).;

  • 授予单位 University of Toronto (Canada).;
  • 学科 Engineering Electronics and Electrical.
  • 学位 M.A.Sc.
  • 年度 2002
  • 页码 101 p.
  • 总页数 101
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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