首页> 外文学位 >Performance analysis and hierarchical timing for DSP system synthesis.
【24h】

Performance analysis and hierarchical timing for DSP system synthesis.

机译:DSP系统综合的性能分析和分层时序。

获取原文
获取原文并翻译 | 示例

摘要

Improvements in computing resources have raised the possibility of spending significantly larger amounts of time on optimization of architectures and schedules for embedded system design than before. Existing design automation techniques are either deterministic (and hence fail to make use of increased time) or use general randomization techniques that may not be efficient at utilizing the time.; In this thesis, new techniques are proposed to increase the efficiency with which design optimizations can be studied, thus enabling larger portions of design space to be explored.; An adaptive approach to the problem of negative cycle detection in dynamic graphs is proposed. This technique is used to determine whether a given set of timing constraints is feasible. The dynamic nature of the graph often occurs in problems such as scheduling and performance analysis, and using an adaptive approach enables testing of more instances, thus increasing the potential design space coverage.; There are currently no hierarchical techniques to represent timing information in sequential systems. A model based on the concept of timing pairs is introduced and studied, that can compactly represent circuits for the purpose of analyzing their performance within the context of a larger system. An important extension of this model also allows timing representation for multirate systems that allows them to be treated similar to single rate systems for the purpose of performance analysis.; The problem of architecture synthesis requires the generation of both a suitable architecture and appropriate mapping and scheduling information of vertices. Some approaches based on deterministic search as well as evolutionary algorithms are studied for this problem. A new representation of schedules based on combining partial schedules is proposed for evolving building blocks in the system.*; *This dissertation includes a CD that is compound (contains both a paper copy and CD as part of the dissertation). The CD requires the following application: Adobe Acrobat.
机译:与以前相比,计算资源的改进已经增加了在嵌入式系统设计的体系结构和计划优化上花费大量时间的可能性。现有的设计自动化技术要么是确定性的(因此无法利用增加的时间),要么使用可能无法有效利用时间的通用随机化技术。本文提出了新的技术来提高研究设计优化的效率,从而可以探索更大的设计空间。针对动态图中的负周期检测问题,提出了一种自适应方法。该技术用于确定一组给定的时序约束是否可行。图的动态性质通常出现在诸如调度和性能分析之类的问题中,使用自适应方法可以测试更多实例,从而增加潜在的设计空间覆盖范围。当前没有分层技术来表示顺序系统中的定时信息。引入并研究了基于时序对概念的模型,该模型可以紧凑地表示电路,以便在较大的系统环境中分析其性能。该模型的重要扩展还允许对多速率系统进行时序表示,从而可以出于性能分析的目的将它们类似于单速率系统进行处理。体系结构综合问题需要生成合适的体系结构以及合适的顶点映射和调度信息。针对此问题,研究了一些基于确定性搜索的方法以及进化算法。提出了一种基于组合部分进度表的进度表的新表示形式,用于系统中不断发展的构建基块。 *本论文包括一张复合CD(该论文包含纸质副本和CD)。该CD需要以下应用程序:Adobe Acrobat。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号