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Algorithms and architectures for robust video transmission.

机译:用于鲁棒视频传输的算法和体系结构。

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摘要

The demand of transmitting video through the Internet and mobile channels has increased significantly in the last several years. The compressed video bitstream is vulnerable to a small amount of bit error or packet loss. Joint source and channel (JSC) coding techniques have been proposed to protect transmitted video data. In most JSC coding techniques, distortion estimation due to packet loss is performed. In this research, a corruption model is proposed, which can be used to enhance the performance of various JSC coding techniques as a distortion estimation tool.; The loss impact of each Macroblock is analyzed in this research on the corruption model by taking into account error concealment, temporal dependency, and the loop filtering effect. In addition, we extend the corruption model to cover more general error propagation behaviors, and apply it to jointly coordinate adaptive intra refresh (AIR) and unequal error protection (UEP) for robust video transmission.; The personal mobile communication system that communicates with the video transmission capability is enabled by extensive research on robust video compression and transmission. However, the complexity of the compression algorithm is also significantly increased. The System-on-Chip (SoC) design for mobile devices is very difficult due to its complexity and the associated verification problem. In this research, we present a design approach that is more flexible while achieving a high performance. The Xtensa processor is a configurable embedded processor for SoC that allows users to design their own instructions to accelerate the computational speed.; The instructions are designed for computationally intensive modules first. The instructions can be the form of either the Single Instruction Multiple Data (SIMD) instruction or the Multiple Instruction Single Data (MISD) instruction. Then, the overall encoder software structure is optimized to avoid the penalty of cache misses in the frame memory access based on the investigation of the memory system of the embedded system.; The improved MPEG-4 encoder software and processor can be used practically for SoC design with the external memory as the main memory, which can reduce the system cost compared to the use of a large internal memory.
机译:在过去的几年中,通过Internet和移动渠道传输视频的需求已大大增加。压缩的视频比特流容易遭受少量的比特错误或分组丢失。已经提出了联合源和信道(JSC)编码技术来保护传输的视频数据。在大多数JSC编码技术中,会执行由于数据包丢失引起的失真估计。在这项研究中,提出了一种破坏模型,该模型可以用来增强各种JSC编码技术作为失真估计工具的性能。在本研究中,通过考虑错误隐藏,时间依赖性和环路滤波效应,分析了每个宏块对损坏模型的损失影响。此外,我们将损坏模型扩展到涵盖更一般的错误传播行为,并将其应用于联合协调自适应帧内刷新(AIR)和不等错误保护(UEP),以实现可靠的视频传输。通过对鲁棒的视频压缩和传输进行广泛的研究,可以实现与视频传输能力进行通信的个人移动通信系统。但是,压缩算法的复杂度也大大增加。由于其复杂性和相关的验证问题,用于移动设备的片上系统(SoC)设计非常困难。在这项研究中,我们提出了一种在实现高性能的同时更加灵活的设计方法。 Xtensa处理器是用于SoC的可配置嵌入式处理器,允许用户设计自己的指令以加快计算速度。该指令首先设计用于计算密集型模块。指令可以是单指令多数据(SIMD)指令或多指令单数据(MISD)指令的形式。然后,根据对嵌入式系统存储系统的研究,对整个编码器软件结构进行优化,避免帧存储器访问中缓存丢失的代价。经过改进的MPEG-4编码器软件和处理器可以实际用于SoC设计,而外部存储器作为主存储器,与使用大型内部存储器相比,可以降低系统成本。

著录项

  • 作者

    Kim, Jin-Gyeong.;

  • 作者单位

    University of Southern California.;

  • 授予单位 University of Southern California.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2003
  • 页码 184 p.
  • 总页数 184
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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