Thermal and power integrity analysis and optimization for high performance VLSI.

摘要

The ever-increasing demands for more functionality and higher speed have pushed the VLSI industry towards more aggressive scaling. Since this trend leads to higher current density and power dissipation in power/ground (P/G) network, the voltage fluctuations on the on-chip power distribution system are becoming a crucial factor in determining the performance and the reliability of VLSI designs. A complete picture of the power grid integrity can be obtained only when IR-drop, electromigration (EM), and thermal effect are all considered together.; However, traditional P/G network design methodologies aim at minimizing the total routing area subject to EM and IR-drop constraints. Thermal effect is ignored in the design, and can cause thermally-induced performance and reliability issues. Therefore, we propose an algorithm for P/G network design with thermal integrity. The basic idea is to include the thermal effect in optimization process. To consider thermal effect in IR-drop, IR-drop constraint must be temperature dependent. In addition, a new self-consistent constraint is defined and used to replace the EM constraint for the thermal integrity. This self-consistent constraint is based on the idea of finding simultaneous solution of EM and SH effects. In order to have required thermal reliability in P/G network, the objective function is based on minimizing the sum of each wire's weighted sum of average power dissipation and wire area. The idea is that the smaller the routing area, the larger the power dissipation will be in P/G network. This approach addresses the power dissipation and thermal integrity.; Due to the thermal integrity design of P/G network, we need to effectively analyze the three-dimensional (3-D) substrate temperature distribution and hot-spot locations. Therefore, we develop an efficient transient thermal simulator, 3D Thermal-ADI, using the ADI method to simulate the 3-D temperature profile. Basically, the ADI method is an alternative solution method which instead of solving the three dimensional problems, solves a succession of three one-dimensional problems. Our simulator is not only unconditionally stable but also has a linear runtime and a linear memory usage.; In order to analyze the thermal reliability of P/G network, we develop a SPICE-compatible thermal simulator, 3D Thermal-IEKS, for interconnect reliability analysis. The basic idea is to model the thermal simulation problem as electrical simulation problem. An adaptive approach is used to reduce the problem size and achieve enough accuracy. Then an improved extended Krylov subspace (IEKS) engine, independent of the number of input ports, is used for simulation.