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Hardware architecture of a behavior modeling coprocessor for network intrusion detection.

机译:用于网络入侵检测的行为建模协处理器的硬件体系结构。

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摘要

Intrusion detection systems protect a network by classifying traffic as normal or malicious. The task of classifying network traffic is difficult and is made more complex by growing performance pressures of increasing traffic rates, the need to detect stealthy attacks by performing sophisticated analysis, the requirement of in-line processing and the inability of software based systems to keep up with the line-speeds. In this dissertation we specifically address four important issues with the design of security systems.;(1) A behavior based technique was implemented in hardware to detect attacks. The technique checks the network traffic for behavioral compliance using configurable, parametric data structures called theories that can model simple as well as complex behavior. Theories translate themselves into hardware using configurable functional units called assertion blocks.;(2) To enable the system to scale with an increase in behavior modules a configurable fabric of assertion blocks has been developed. The configurable assertion block fabric contains pre-synthesized assertion modules that are triggered by theories.;(3) A Multi-Level Fractional Hash Algorithm was developed to effectively manage the traffic information gathered by inserting and querying a connection record with average case of O(1).;(4) To block pre-defined malicious content a high speed Trie based pattern matching algorithm was designed. The throughput of the algorithm is 14 Gbps and is independent of length of the patterns, location of the malicious content in streaming data and the number of patterns in the pattern set.;The architectural and algorithmic enhancements presented above were integrated to architect The Hardware Architecture of a Behavior Modeling Coprocessor for Network Intrusion Detection, called Behavioral Intrusion Prevention and Detection System (BIPDS). BIPDS is designed to carry out threat detection with dedicated hardware accelerators by monitoring all communication layers, extracting relevant data, and enabling highly efficient operation. The designed system supports large number of protocols and applications, and allows for extensibility to new applications and services. BIPDS can parallel process one million simultaneous data connections at 11Gbps and has a die area of 17.3 mm2 (TSMC 0.25 micro library), and has a morphable data path to accommodate changes in network sizes and configurations.
机译:入侵检测系统通过将流量分类为正常或恶意来保护网络。对网络流量进行分类的任务很困难,并且由于日益增加的流量速率带来的性能压力,通过执行复杂分析来检测隐身攻击的需求,在线处理的需求以及基于软件的系统无法跟上来的要求,使得任务变得更加复杂与线速度。本文主要针对安全系统设计中的四个重要问题:(1)在硬件中实现了基于行为的技术来检测攻击。该技术使用称为理论的可配置,参数化数据结构来检查行为是否符合网络行为,从而可以对简单行为和复杂行为进行建模。理论使用称为断言块的可配置功能单元将其自身转换为硬件。(2)为了使系统能够随着行为模块的增加而扩展,已经开发了可断言块的可配置结构。可配置的断言块结构包含由理论触发的预合成断言模块。(3)开发了一种多级分数散列算法,以通过插入和查询平均为O( 1)。(4)为了阻止预定义的恶意内容,设计了一种基于Trie的高速模式匹配算法。该算法的吞吐量为14 Gbps,并且与模式长度,恶意数据在流数据中的位置以及模式集中的模式数量无关。;以上介绍的体系结构和算法增强功能已与架构师集成在一起用于网络入侵检测的行为建模协处理器的概述,称为行为入侵预防和检测系统(BIPDS)。 BIPDS旨在通过监视所有通信层,提取相关数据并实现高效操作,使用专用的硬件加速器来进行威胁检测。设计的系统支持大量协议和应用程序,并允许扩展到新的应用程序和服务。 BIPDS可以11Gbps的速度并行处理100万个同时的数据连接,其管芯面积为17.3 mm2(TSMC 0.25微型库),并且具有可变形的数据路径以适应网络大小和配置的变化。

著录项

  • 作者

    Yadav, Meeta.;

  • 作者单位

    North Carolina State University.;

  • 授予单位 North Carolina State University.;
  • 学科 Electrical engineering.
  • 学位 Ph.D.
  • 年度 2007
  • 页码 195 p.
  • 总页数 195
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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