A Reconfigurable Host Interconnection Scheme for Occam-based Field Programmable Gate Arrays

摘要

This paper reports on the development of an interconnection scheme for field-programmable gate arrays (FPGAs). These FPGAs may be programmed in the Occam parallel programming language. Now, not only may the inter-process communication channels provided by Occam be used on-chip, but they may also be extended to a host processor using the ubiquitous Universal Serial Bus (USB). Bidirectional channels of BYTEs are carried along this bus to a host processor (running Linux) where they are presented to application code using a device driver that provides similar capabilities to the standard B004 card link driver. A unidirectional end-to-end throughput between Linux processes and FPGA processes, across USB, has been measured as high as 1025 kbytes/sec, although this rate is only achieved in favourable circumstances. Similarly, 410 kbytes/sec may be transferred in both directions simultaneously. Unidirectional transmission rates of more than 600kbytes/sec, and bidirectional rates of 175-300kbytes/sec in each direction may be achieved in a wide range of circumstances. The paper presents a range of performance figures, explaining which are limited by the underlying characteristics of the USB bus and which are caused by the current implementation. By implementing a transputer OS-Link in the FPGA, it is possible for a USB-enabled computer to communicate with a network of transputers, providing a convenient - and potentially faster - alternative to previous methods.